cache coherence problem: FIXED

Juergen Kienhoefer juergen at kienhoefer.com
Wed Nov 19 04:40:55 EST 2003


Ben, et al.
Thanks, the test program is fixed and working.
I appreciate your help very much!!!
See attachment
Juergen


Benjamin Herrenschmidt wrote:

>On Tue, 2003-11-18 at 16:22, Benjamin Herrenschmidt wrote:
>
>
>>On Tue, 2003-11-18 at 16:00, Juergen Kienhoefer wrote:
>>
>>
>>>Guys,
>>>Thank you very much for the ideas.
>>>Basically, what I need to do is:
>>>dcbst
>>>sync
>>>iccci
>>>
>>>
>>^^^^^^^
>>No: icbi
>>
>>
>>
>>>sync
>>>isync
>>>for every 32 bytes of the memory block I put code in.
>>>
>>>
>
>Actually, to be precise, you need:
>
> 1) A loop of dcbst's over every cache line crossed by your code
> 2) one sync
> 3) A loop of icbi's over every cache line crossed by your code
> 4) one sync, one isync
>
>Ben.
>
>
>


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