kernel oops due to unaligned access with lswi

Paul Mackerras paulus at
Mon Nov 17 11:50:49 EST 2003

Alan Modra writes:

> Yes.  I can't see any problem with gcc's behaviour here, and I'm
> surprised that some processor is taking alignment exceptions on lswi.
> book3 ppcas says lswi will generate an alignment exception when "the
> operand is in storage that is Write Through Required or Caching
> Inhibited, or the processor is in Little-Endian mode".  It can also
> happen for operands that cross segment boundaries or page boudaries with
> different attributes.

Well, firstly PPCAS didn't exist when the 601 was designed, and
secondly the architecture allows implementations to consist of a mix
of hardware and software - meaning that hardware can take an exception
on any condition it likes and expect software to fix it up (provided
hardware gives software enough information to fix it up, etc.).

The original PPC architecture talks about one of the reasons for an
alignment interrupt being that "the operand of an elementary string
load or store crosses a protection boundary".  And the 601 manual says
that a string load or store (except lscbx) will only cause an
interrupt if it crosses a page boundary and it is not word aligned.
Olaf, do we know what the source and destination addresses were?


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