Dual G3's in Umax S900?

[Benjamin Herrenschmidt]

>> No. Doing SMP with G3s is a terrible nightmare as those CPUs don't
>> have the necessary coherency protocols.
>>
>Is MEI not enough for Linux? Instruction cache coherency problems? Or is it
>because of the rudimentary implementation of tlbie/tlbia? Just curious.

I don't have all in mind, from memory, the lack of bus broadcast for tlbie
is one, the lack of bus coherency for cache inval is another, but I am not
sure.

I think in the past, we used to have BeBox (dual 603) working, which I suppose
is pretty similar, but still hell. No way I support that for pmac kernels.

Ben.


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