ppc LE questions (seeking help hand info pointers)

Benjamin Herrenschmidt benh at kernel.crashing.org
Sat Sep 22 06:42:44 EST 2001

Sorry, part of my previous post got "eaten" by my mailer, here it is.

>On the other side, running with MMU ON makes that small task of setting
>up the kernel environement on exception entry and unwiding it on
>exception exit a lot more tricky. It prevents using MMU off as an
>efficient way of using SRR0/SRR1 without caring about taking TLB misses
>during critical code pat....

So, I was saying that it prevents using MMU off as an efficient wau to
avoid taking TLB misses during those critical code path. Having the
translations always enabled force you to pin down at least one TLB entry
which makes the TLB handlers more complicated (and so adds overhead). It
also make the exception entry/exit path more tricky as those have to
touch datas not covered by pinned TLB entries (like process stacks), more
or less forcing us to use specific exception stacks (pinned down) to
avoid horrible bloat.

This will make some bits of the 32 bits kernel almost as tricky as when
running below Hypervisor on LPAR :)


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