pmud monitoring temperature (Re: powerbook doubles)

[Michael Schmitz]

> i reworked this patch to work with the current bk tree (argh. i just complained to iain that diffs
> against a moving target were gross)
>
> http://redcloud.uccs.edu/~bcmidgle/linux/
>
> btw, it looks like troy wants the _{gs}et_THRM{123} macros changed to use some different macros,
> but i'm not familiar with that stuff so i just reenabled the old macros.

I don't think what changes you propose there but from the comment on your
patch page ('cpu speed not included in calculations') it seems you picked
up the old version of the patch. I attach the version including
conversion time calculation from processor speed (for 2.4.0pre). The CPU
speed is  preset to 500 MHz in case it can't be determined from OF, this
gives too long conversion times for slower processors - does this hurt?
What is the maximum CPU speed for machines without clock_frequency
present in the device tree?

	Michael
-------------- next part --------------
--- 2.4.0-test9/arch/ppc/kernel/setup.c.cputemp	Tue Sep 12 07:51:56 2000
+++ 2.4.0-test9/arch/ppc/kernel/setup.c	Sun Oct  8 14:50:09 2000
@@ -181,31 +181,84 @@
 	ppc_md.halt();
 }
   
+
+extern int _get_THRM1();
+extern int _get_THRM2();
+extern int _get_THRM3();
+extern int _set_THRM1(int);
+extern int _set_THRM2(int);
+extern int _set_THRM3(int);
+
 unsigned long cpu_temp(void)
 {
 	unsigned char thres = 0;
+	unsigned int othrm1;
+	unsigned int othrm2;
+	unsigned int othrm3;
+	unsigned int thrm1;
+	unsigned int thrm3;
+	unsigned int cnt;
+	unsigned int thresd;
+	unsigned int threst;
+	unsigned int i;
+	unsigned int cpu_freq;
 	
-#if 0
+	othrm1 = _get_THRM1();
+	othrm2 = _get_THRM2();
+	othrm3 = _get_THRM3();
 	/* disable thrm2 */
 	_set_THRM2( 0 );
-	/* threshold 0 C, tid: exceeding threshold, tie: don't generate interrupt */
-	_set_THRM1( THRM1_V );
+	_set_THRM1( 0 );
 
 	/* we need 20us to do the compare - assume 300MHz processor clock */
+	/* max value for sitv is 0x3fff - or 16383 */
+	/* this set for 500 MHz Pismo - how do we get access to clock?? */
+
+	cpu_freq = 500;
+	if ( have_of )
+	{
+		struct device_node *cpu_node;
+		int *fp;
+
+		cpu_node = find_type_devices("cpu");
+		if ( cpu_node ) {
+			fp = (int *) get_property(cpu_node, "clock-frequency", NULL);
+			if ( fp ) cpu_freq = *fp / 1000000;
+		}
+	}
+
+	/* 25 usec conversion time - max for 500 Mhz is approx. 32 usec */
 	_set_THRM3(0);
-	_set_THRM3(THRM3_E | (300*30)<<18 );
+	_set_THRM3(THRM3_E | THRM3_SITV(cpu_freq*25) );
 
-	udelay(100);
-	/* wait for the compare to complete */
-	/*while ( !(_get_THRM1() & THRM1_TIV) ) ;*/
-	if ( !(_get_THRM1() & THRM1_TIV) )
-		printk("no tiv\n");
-	if ( _get_THRM1() & THRM1_TIN )
-		printk("crossed\n");
+	thresd = 1 << 6;
+	threst = thresd;
+	i =  7;
+	while (i > 1 && thresd > 2)
+		{
+		thrm1 = (THRM1_THRES(threst)) | THRM1_V;
+		_set_THRM1(thrm1);
+		cnt = 10000;
+		while ( !((thrm1=_get_THRM1()) & THRM1_TIV) && cnt ) cnt--;
+		/* printk("THRM1 %8x %d %c %d %d %d\n",thrm1,10000-cnt,(thrm1&THRM1_TIN?'x':' '),threst,thresd,i); */
+		if (cnt == 0)
+			{ printk("THRM1: no interrupt %8x\n",thrm1); threst = 0; break; }
+		else
+			{
+			if ( thrm1 & THRM1_TIN )
+				{ thresd = thresd >> 1; threst += thresd; }
+			else
+				{ thresd = thresd >> 1; threst -= thresd; }
+			i--;
+			}
+		}
+	thres = threst;
+	/* printk("THRM1 %d\n",threst); */
 	/* turn everything off */
-	_set_THRM3(0);
-	_set_THRM1(0);
-#endif
+	_set_THRM3(othrm3);
+	/*_set_THRM1(0);*/
+	_set_THRM1(othrm1);
+	_set_THRM2(othrm2);
 		
 	return thres;
 }
--- 2.4.0-test9/include/asm-ppc/processor.h.cputemp	Mon Sep 11 00:45:07 2000
+++ 2.4.0-test9/include/asm-ppc/processor.h	Sun Oct  8 14:27:00 2000
@@ -261,15 +261,16 @@
 #define	  TCR_FIE		0x00800000	/* FIT Interrupt Enable */
 #define	  TCR_ARE		0x00400000	/* Auto Reload Enable */
 #define	SPRN_THRM1	0x3FC	/* Thermal Management Register 1 */
-#define	  THRM1_TIN		(1<<0)
-#define	  THRM1_TIV		(1<<1)
-#define	  THRM1_THRES		(0x7f<<2)
-#define	  THRM1_TID		(1<<29)
-#define	  THRM1_TIE		(1<<30)
-#define	  THRM1_V		(1<<31)
+#define	  THRM1_TIN		(1<<31)		/* these bits were defined in inverted endian sense originally */
+#define	  THRM1_TIV		(1<<30)
+#define	  THRM1_THRES(x)	((x&0x7f)<<23)
+#define	  THRM1_TID		(1<<2)
+#define	  THRM1_TIE		(1<<1)
+#define	  THRM1_V		(1<<0)
 #define	SPRN_THRM2	0x3FD	/* Thermal Management Register 2 */
 #define	SPRN_THRM3	0x3FE	/* Thermal Management Register 3 */
-#define	  THRM3_E		(1<<31)
+#define	  THRM3_E		(1<<0)
+#define   THRM3_SITV(x)		((x&0x3fff)<<1)
 #define	SPRN_TSR	0x3D8	/* Timer Status Register */
 #define	  TSR_ENW		0x80000000	/* Enable Next Watchdog */
 #define	  TSR_WIS		0x40000000	/* WDT Interrupt Status */