PCI bridge bases, IDE on the B&W G3

[Geert Uytterhoeven]

On Thu, 21 Sep 2000, Samuel Rydh wrote:
> - The B&W G3 has two PCI-buses. The second one is
> accessed through a DEC,21154 controller. The expension
> slots as well as the internal CMD646 IDE-controller is on
> the second bus. The problem is that the bridge reports
> zero in the both baseregisters (the new PCI resource
> allocation scheme then fails miserably). This problem
> is simply fixed by (arch/ppc/kernel/pci.c):
>
>  void __init pcibios_fixup_bus(struct pci_bus *bus)
>  {
> +       pci_read_bridge_bases(bus);
> +
>         if ( ppc_md.pcibios_fixup_bus )
>                 ppc_md.pcibios_fixup_bus(bus);
>  }
>
> (i386 does it this way too).

Aha! I think this will also solve the problems on the G4.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


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