patch to get latest XFree 4.0 snapshot (xf3918) to work on pp cwith r128

[Benjamin Herrenschmidt]

On Fri, Mar 10, 2000, Gabriel Paubert <paubert at iram.es> wrote:

>What do you mean with x100 ? Is it a series of PMAC models ? sync and
>eieio perform an address-only bus broadcast that should be terminated by
>the host bridge but never to the PCI bus so they can't crash HW. Is the
>host bridge/memory controller really that buggy ?

Those machines are also known as the NuBus PowerMacs. The adress only
cycle is broadcast on their bus and makes some of Apple's AV cards crash.

>And isync is not irrelevant on any processor since a) it flushes the
>instruction queue and b) it ensures that the effect of all previous
>instructions on machine state is taken into account before the next
>instruction executes (that's important if you change context by changing
>segment registers or modify some MSR bits).


** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/