Trying to enable backside on a G4

[Michel Lanners]

Hi Guillaume,

On   8 Jul, this message from Guillaume Laurès echoed through cyberspace:
> I'm just starting writing kernel-level code :-), and I was trying to set
> the L2CR register on a G4 upgrade for a PCI PowerMac (actually a
> 8600/250 upgraded with a XLR8 MACh Carrier G4 350/233)

If you're working on 2.4.0-style kernels, here is a patch that
implements this functionality as a kernel command line option.

If you are trying to produce a standalone program, your example code
will not work. It will only work inside the kernel, not from userspace.
You could try to build it as a module....

But then again, you can easily set the l2cr from userspace. I have this
in my /etc/rc.d/rc.sysinit:

action "Mounting proc filesystem" mount -n -t proc /proc /proc

# Now that /proc is available, set up level2 cache:
echo 0 > /proc/sys/kernel/l2cr
echo '0x29200000' > /proc/sys/kernel/l2cr
echo '0xa9200000' > /proc/sys/kernel/l2cr
action "Enabling level2 cache" echo -n

doing a 'cat /proc/sys/kernel/l2cr' will show you the current setting of
l2cr.

Be aware that there might be problems with just using the echo>
technique, as the cache needs to be invalidated before enabling it.
Normally that should happen automagically; however it didn't work for
me. That's why there are two 'echo's above.

My final l2cr value is:

[mlan at piglet ~]$ cat /proc/sys/kernel/l2cr
0xa9000000:  enabled, no parity, 512KB, +2 clock, pipelined burst SRAM, copy-back, 0.5ns hold

Have fun

Michel

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