question about altivec registers

[Jim Terman]

Will the linuxppc kernal as it is right now save the AltiVec registers
if we enable the MSR VEC bit.  I've been trying to follow the other messages
on this subject, but I'm not clear.

Kumar Gala writes:
> 
> The linux kernel as is will not effect the AltiVec registers in any way.
> However, there is a minor change to the kernel that will be required.  You
> will need to enable the MSR VEC bit (bit 6 in the MSR) to tell the
> processor that the AltiVec Unit is available (this is similar to the MSR
> FP bit).  If the bit is not set the processor will generate an AltIVec
> Unavailable exception which will be trapped (incorrectly) as an unknown
> 0xf00 exception
> 
> the 0xf00 exception is for the performance monitors
> and 0xf20 in the AltiVec unavailable exception.
> 
> All if these details are documented in the AltiVec Programming Environ
> Manual (available from the Motorola Website).  
> 
> If you need any help getting a simple kernel up and running for running
> single altiVec enabled processes let me know.
> 
> - kumar gala
> 
> 
> ignorance is bliss.
> 
> 
> 
-- 
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Jim Terman       |   323 Vintage Park Dr.   |   Voice: (650) 356-5446
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