sync problem in arch/ppc/kernel/misc.S?

[Charles Lepple]

Does anyone have any recollection of writing the comment "some chip revs
have problems here..." in arch/ppc/kernel/misc.S? It's in the
enable_interrupts subroutine, and on a DY4 603e board, I do seem to have
problems :-) It doesn't seem to be getting past this sync instruction,
and I'm a little confused as to why not. Anyone with insights into this?
(FWIW, the PVR is 0x60400, implying that it's not the 2.5V core chip...)

Thanks,

Charles Lepple
clepple at mitre.org

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