altivec

[sean o'malley]

I would love to work with Altivec, does anyone have any idea where to get
the hardware preferably cheap =)?


>>Well, if you do instruction-by-instruction emulation, the iteration count is
>>at most 16 (16 bytes in a vector). Furthermore, the overhead of a context
>>switch into privileged mode and back again is not negligible (at the very
>>least a pipeline flush and some saving/restoring of registers). Finally,
>>keeping the emulated vector registers somewhere in memory means that you will
>>quite often be limited by the availability of 'only' one load/store unit.
>
>That's true, I forgot about the 16 byte limit.  That will really make the
>overhead significant.  Kind of annoying to me (my typical vector length is
>over 900).  Maybe having two libraries is the way to go, then...
>
>>> I'm also wondering what has been done on this issue on the Intel side of
>>> the fence, since KNI and 3Dnow! are similar to Altivec in concept and, at
>>> least for 3Dnow!, implementation.
>>>
>>Similar? Please forgive my ranting, but AltiVec is feature-complete,
>>orthogonal, and implemented without compromises. MMX, 3DNow!, and ISSE have
>>none of the above three qualities. They were available sooner, but that's
>>about it.
>
>That's why I said "similar in concept" ... not execution.  And I said KNI
>(the PIII new instructions), not MMX, which is integers only.  (Also why I
>didn't mention Sun's VIS).
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>### Mike DeSimone ### Hot-Wire at mail.utexas.edu ### ares.marsbase.mars ###

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