Porting to NuBus PowerMacs

[Paul Mackerras]

David A. Gatwood <marsmail at globegate.utm.edu> wrote:

> Beyond that, it will also require changes to irq.c to handle the interrupt
> controller and a lot of code for DMA, if that's desired (I don't think
> it's even remotely similar, AFAICT).  Of course, that stuff can be
> obtained from Mach, but it'll be a lot of work.  Oh, and the i/o base

I gather that DMA is not cache-coherent on the NuBus powermacs, which
opens a whole new can of worms... it means you have to do explicit
flush/invalidate requests, but it also means that you *have* to make
sure that the cpu isn't accessing any words in any of the cache lines
that the dma controller is accessing.  If the dma buffer isn't
cacheline-aligned, and is preceded or followed by unrelated stuff, you
are in trouble.

Paul.

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