Trying a Promise Ultra/66 on powerpc
mlan at cpu.lu
Tue Aug 10 06:15:19 EST 1999
Hi gentlemen (any ladies around?),
On 9 Aug, this message from Benjamin Herrenschmidt echoed through cyberspace:
> On Mon, Aug 9, 1999, Paul Mackerras <paulus at cs.anu.edu.au> wrote:
>>Basically the problem is that the IDE driver assumes that you access
>>all IDE controllers via I/O ports. When you have a controller that
>>has memory-mapped registers, there is a problem. When you have a
>>system where one IDE controller has I/O ports and another has memory-
>>mapped registers, you have a bigger problem. The current approach to
>>solving this problem is to map the addresses of the memory-mapped
>>registers into pseudo I/O port numbers (by subtracting _IO_BASE). If
>>there is a better way, somebody let me know. :-)
> Looks like the best way would be to store the port base or pointers to
> the in/out functions in the HWIF structure.
How about fixing this in the kernel's PCI bus structures, by adding any
required offsets in the pci_fixup() routines? This would make for clean
inb()/outb() definitions (no offset), and also accomodates multiple I/O
spaces behind more than one bridge. For instance, on the 7x00, both
bandit and chaos have I/O space; the one for the PCI cards, the other
for control (yes, control has an I/O port range! Not sure it serves,
Any fixed-offset approach would break with multiple I/O ranges.... Not
to mention the 9x00 machines (two separate host bridges, each three
slots), where you can't work around the problem by using hardcoded
addresses for the known motherboard chips.
I guess this approach could be made to work across the PPC
architecture, not only on the PMac, as the PPC in general lacks anything
special about I/O space... after all, those are just small memory
Michel Lanners | " Read Philosophy. Study Art.
23, Rue Paul Henkes | Ask Questions. Make Mistakes.
L-1710 Luxembourg |
email mlan at cpu.lu |
http://www.cpu.lu/~mlan | Learn Always. "
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