Incomplete (potentially broken) Raven Chipset support for PREP machines.
VALETTE Eric
valette at crf.canon.fr
Mon Dec 7 20:00:27 EST 1998
>>>>> "Gabriel" == Gabriel Paubert <paubert at iram.es> writes:
Gabriel> On Fri, 4 Dec 1998, Cort Dougan wrote:
Gabriel> Actually the names raven and prep in the config method routines are
Gabriel> misleading, all Motorola bridges I know support this method (106, 106 and
Gabriel> Raven), and it should be used since it is more flexible than the direct
Gabriel> mapped method also supported by the 105 and 106 but not by the Raven.
Sorry to have this question but what are the "10[56]" ?
Gabriel> Using the residual data for this is the Right Way (TM), although we should
Gabriel> do something for non residual data present.
I'm affraid, parsing residual data if far from beeing sufficient : as far as I
understand, the residual data are set up by the boot loader. How will that help
to :
1) reprogram and IDE controller to native PCI mode rather than "legacy PC"
mode,
2) change the set up interrupt priorities ? (the raven can do that),
3) handle multi-function devices?
4) Change the IRQ for PCI devices... (writting the PCI configuration
register is not sufficeint. You must also enable the interrupt in the
raven registers),
Gabriel> I have code which correctly extracts the interrupt routing from the
Gabriel> residual data, I hope to make it public next week, it has been working
Gabriel> for two weeks on my MVME2600 and simply needs some cleanup:
Gabriel> [root at vcorr1 ppc]# cat /proc/interrupts
Gabriel> CPU0
Gabriel> 1: 8 82c59 keyboard
Gabriel> 2: 0 82c59 cascade
Gabriel> 4: 191 82c59 serial
Gabriel> 16: 0 OpenPIC 82c59 cascade
Gabriel> 18: 17047 OpenPIC DC21140 (eth0)
Gabriel> 19: 7429 OpenPIC ncr53c8xx
Gabriel> 21: 7542 OpenPIC vme (universe)
Gabriel> BAD: 1 spurious or short
I would love to test it on my MCP750 system to see how the IDE controller irq
is routed... This would probably enable me to install my own Linux installation...
-- eric
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