[PATCH] ARM: dts: aspeed: yosemite5: add x4 E1.S expansion board I2C mux

[Kevin Tung]

On Thu, Jan 8, 2026 at 12:46 PM Andrew Jeffery
<andrew at codeconstruct.com.au> wrote:
>
> On Mon, 2025-12-22 at 19:25 +0800, Kevin Tung wrote:
> > The new hardware design adds two additional E1.S devices behind an
> > I2C mux at address 0x73 on bus 10. Add support for this mux in the
> > DTS device tree.
>
> Out of curiosity, you're monitoring them with the NVMe-MI basic
> management command and not NVMe-MI over MCTP, or is there something
> else going on which motivates describing empty mux legs?
>
> Andrew

Hi Andrew,

We’re monitoring them using the NVMe-MI basic management commands
directly, which is why the empty mux legs are described.

Kevin