[PATCH v16 1/3] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Krzysztof Kozlowski
krzk at kernel.org
Wed Sep 10 17:44:00 AEST 2025
On 10/09/2025 09:25, Jeremy Kerr wrote:
> Hi Ryan & Krzysztof,
>
> [my response is intended to make progress on the newer v18 submission,
> but we still have this item from v16 to resolve, hence picking up this
> thread]
>
>> Your compatible already expressed that there are two interfaces, so
>> your drivers can just choose whichever they want. If you need to toggle a
>> bit in system controller, it is fine. If you need different compatible,
>> then that's a NAK.
You trimmed response and brought some very old thread which does not
exist in my inbox.
I have absolutely no clue what this refers to.
>
> I think the mention of "two register interfaces" is a bit misleading
> here; it implies that it's just two interfaces to the same hardware.
>
> From reading between the lines on the datasheet, it seems that this is
> two completely separate IP cores, that:
>
> * are mapped to the same MMIO space; but
> * both happen to be I2C controllers.
>
> - where the single "global register" (which you mention above) provides
> the facility to mux the MMIO mapping between the two. Some versions of
> the overall SoC have only the old core, some have only the new, and some
> have both, selectable via this register.
>
> Ryan, can you confirm whether this is the case?
>
> Given there are actual behavioural differences between the two
> peripherals - beyond just the register set - that would seem to indicate
> separate binding types (+ a syscon mux control) to me, but I'm keen to
> hear any other options.
>
> Krzysztof, if that is the case, any thoughts on the representation of
> separate bindings?
I have no clue what is this about.
Best regards,
Krzysztof
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