[PATCH v2 4/4] irqchip/aspeed-scu-ic: Add support AST2700 SCU interrupt controllers
Ryan Chen
ryan_chen at aspeedtech.com
Fri Sep 5 18:57:08 AEST 2025
> Subject: RE: [PATCH v2 4/4] irqchip/aspeed-scu-ic: Add support AST2700 SCU
> interrupt controllers
>
> On Fri, Sep 05 2025 at 05:55, Ryan Chen wrote:
> >> So you have two different handlers. Why can't you provide two
> >> different mask/unmask/ functions along with a seperate irq chip
> >> instead of cluttering the code with conditionals. Thes two variants share no
> code at all.
> >
> > I will add irq_chip in SCU_VARIANT, like following.
> >
> > struct aspeed_scu_ic_variant {
> > ..
> > + struct irq_chip *irq_chip;
> > };
> >
> > #define SCU_VARIANT(_compat, _shift, _enable, _num, +_irq_chip,
> > _split, _ier, _isr) { \
> > + .irq_chip = _irq_chip, \
> > .....
> > }
> >
> > static const struct aspeed_scu_ic_variant scu_ic_variants[] __initconst = {
> > SCU_VARIANT("aspeed,ast2400-scu-ic", 0, GENMASK(15, 0), 7,
> &aspeed_scu_ic_chip_combined, false, 0, 0),
> > SCU_VARIANT("aspeed,ast2500-scu-ic", 0, GENMASK(15, 0), 7,
> &aspeed_scu_ic_chip_combined, false, 0, 0),
> > SCU_VARIANT("aspeed,ast2600-scu-ic0", 0, GENMASK(5, 0), 6,
> &aspeed_scu_ic_chip_combined, false, 0, 0),
> > SCU_VARIANT("aspeed,ast2600-scu-ic1", 4, GENMASK(5, 4), 2,
> &aspeed_scu_ic_chip_combined, false, 0, 0),
> > SCU_VARIANT("aspeed,ast2700-scu-ic0", 0, GENMASK(3, 0), 4,
> &aspeed_scu_ic_chip_split, true, 0x00, 0x04),
> > SCU_VARIANT("aspeed,ast2700-scu-ic1", 0, GENMASK(3, 0), 4,
> &aspeed_scu_ic_chip_split, true, 0x00, 0x04),
> > SCU_VARIANT("aspeed,ast2700-scu-ic2", 0, GENMASK(3, 0), 4,
> &aspeed_scu_ic_chip_split, true, 0x04, 0x00),
> > SCU_VARIANT("aspeed,ast2700-scu-ic3", 0, GENMASK(1, 0), 2,
> &aspeed_scu_ic_chip_split, true, 0x04, 0x00),
> > };
>
> You have this split_ier_isr field already, which should be good enough to select
> the chip to assign, similar to what you do with the handler, no?
Got it, thanks your feedback.
>
> Thanks,
>
> tglx
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