[PATCH v5 2/8] dt-bindings: PCI: Add ASPEED PCIe RC support
Jacky Chou
jacky_chou at aspeedtech.com
Wed Nov 19 14:11:33 AEDT 2025
Hi Rob,
> > +
> > + pcie at 8,0 {
>
> This node and the properties need to be in the schema along with a ref to
> pci-pci-bridge.yaml.
>
Thank you for your information
> > + reg = <0x804000 0 0 0 0>;
>
> The address should not have the bus number as it is dynamic.
>
Agreed.
The bus range is 0x00 to 0xFF. I will modify it in next version.
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + device_type = "pci";
> > + resets = <&syscon ASPEED_RESET_PCIE_RC_O>;
> > + reset-names = "perst";
>
> Not sure this name is correct. PERST is a signal on the connector going
> downstream to the endpoint.
>
The reset property actually controls the PERST pin on this port.
At the same time, it also reset this port.
Therefore, here uses the "perst" name.
> > + clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pcierc1_default>;
> > + phys = <&pcie_phy1>;
> > + ranges;
> > + };
> > + };
Thanks,
Jacky
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