[PATCH v6 12/26] bitfield: Add less-checking __FIELD_{GET,PREP}()

[Ping-Ke Shih]

Geert Uytterhoeven <geert at linux-m68k.org> wrote:
> Hi Ping-Ke,
> 
> On Fri, 7 Nov 2025 at 02:16, Ping-Ke Shih <pkshih at realtek.com> wrote:
> > Geert Uytterhoeven <geert at linux-m68k.org> wrote:
> > > The extra checking in field_prep() in case the compiler can
> > > determine that the mask is a constant already found a possible bug
> > > in drivers/net/wireless/realtek/rtw89/core.c:rtw89_roc_end():
> > >
> > >     rtw89_write32_mask(rtwdev, reg, B_AX_RX_FLTR_CFG_MASK, rtwdev->hal.rx_fltr);
> > >
> > > drivers/net/wireless/realtek/rtw89/reg.h:
> > >
> > >     #define B_AX_RX_MPDU_MAX_LEN_MASK GENMASK(21, 16)
> > >     #define B_AX_RX_FLTR_CFG_MASK ((u32)~B_AX_RX_MPDU_MAX_LEN_MASK)
> > >
> > > so it looks like B_AX_RX_FLTR_CFG_MASK is not the proper mask for
> > > this operation...
> >
> > The purpose of the statements is to update values excluding bits of
> > B_AX_RX_MPDU_MAX_LEN_MASK. The use of B_AX_RX_FLTR_CFG_MASK is tricky, but
> > the operation is correct because bit 0 is set, so __ffs(mask) returns 0 in
> > rtw89_write32_mask(). Then, operation looks like
> >
> >    orig = read(reg);
> >    new = (orig & ~mask) | (data & mask);
> >    write(new);
> 
> Thanks for your quick confirmation!
> So the intention really is to clear bits 22-31, and write the rx_fltr
> value to bits 0-15?
> 
> if the clearing is not needed, it would be better to use
> #define B_AX_RX_FLTR_CFG_MASK GENMASK(15, 0)

But it should be 
#define B_AX_RX_FLTR_CFG_MASK (GENMASK(31, 22) | GENMASK(15, 0))

Originally (with bug) we just backup rx_fltr and write whole 32-bits back,
but it's incorrect to modify GENMASK(21, 16) which is written by another
code.

One way is to implement a special function to replace
  rtw89_write32_mask(rtwdev, reg, B_AX_RX_FLTR_CFG_MASK, rtwdev->hal.rx_fltr);
Such as
  rtw89_write_rx_flter(rtwdev, rtwdev->hal.rx_fltr)
  {
    orig = read(reg);
    new = (orig & ~mask) | (data & mask);
    write(new);
  }

Another way is that I add value of B_AX_RX_MPDU_MAX_LEN_MASK into
rtwdev->hal.rx_fltr. Then, just write whole 32-bit, no need mask.

> 
> If the clearing is needed, I still think it would be better to
> change B_AX_RX_FLTR_CFG_MASK, and split the clearing off in a separate
> operation, to make it more explicit and obvious for the casual reader.
> 
> > Since we don't use FIELD_{GET,PREP} macros with B_AX_RX_FLTR_CFG_MASK, how
> > can you find the problem? Please guide us. Thanks.
> 
> I still have "[PATCH/RFC 17/17] rtw89: Use bitfield helpers"
> https://lore.kernel.org/all/f7b81122f7596fa004188bfae68f25a68c2d2392.1637592133.git.geert+renesas@glid
> er.be/
> in my local tree, which started flagging the use of a discontiguous
> mask with the improved checking in field_prep().

Got it. You are doing "Non-const bitfield helper conversions". 

Ping-Ke