[PATCH v5 1/2] dt-bindings: mailbox: Add ASPEED AST2700 series SoC

[Jammy Huang]

> On Wed, Jun 25, 2025 at 03:34:16PM +0800, Jammy Huang wrote:
> > Introduce the mailbox module for AST27XX series SoC, which is
> > responsible for interchanging messages between asymmetric processors.
> >
> > Signed-off-by: Jammy Huang <jammy_huang at aspeedtech.com>
> 
> You didn't add Krzysztof's Reviewed-by...
Hi Rob,

I checked submitting patches' guide, and it says that if the patch has changed
substantially in following version, these tags might not be applicable anymore
and thus should be removed. I also mentioned this in changelog on the cover.

I am not sure about this, so may I keep Krzk's Reviewed-by tag?
If it's OK, I will add it back on next patch.

> 
> > ---
> >  .../mailbox/aspeed,ast2700-mailbox.yaml       | 60
> +++++++++++++++++++
> >  1 file changed, 60 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox.yam
> > l
> > b/Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox.yam
> > l
> > new file mode 100644
> > index 000000000000..0a5f43de5f28
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox
> > +++ .yaml
> > @@ -0,0 +1,60 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +http://devicetree.org/schemas/mailbox/aspeed,ast2700-mailbox.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: ASPEED AST2700 mailbox controller
> > +
> > +maintainers:
> > +  - Jammy Huang <jammy_huang at aspeedtech.com>
> > +
> > +description:
> 
> You need '>' to preserve paragraphs.
OK

> 
> > +  ASPEED AST2700 has multiple processors that need to communicate
> > + with each  other. The mailbox controller provides a way for these
> > + processors to send  messages to each other. It is a hardware-based
> > + inter-processor communication  mechanism that allows processors to
> > + send and receive messages through  dedicated channels.
> 
> And a blank line between paragraphs.
> 
OK

> > +  The mailbox's tx/rx are independent, meaning that one processor can
> > + send a  message while another processor is receiving a message
> simultaneously.
> > +  There are 4 channels available for both tx and rx operations. Each
> > + channel  has a FIFO buffer that can hold messages of a fixed size
> > + (32 bytes in this  case).
> 
> And here.
> 
Sure.

> > +  The mailbox controller also supports interrupt generation, allowing
> > + processors to notify each other when a message is available or when
> > + an event  occurs.
> > +
> > +properties:
> > +  compatible:
> > +    const: aspeed,ast2700-mailbox
> > +
> > +  reg:
> > +    maxItems: 2
> > +    description:
> > +      Contains the base addresses and sizes of the mailbox controller. 1st
> one
> > +      is for TX control register; 2nd one is for RX control register.
> 
> Instead, just:
> 
> items:
>   - description: TX control register
>   - description: RX control register
> 
Agree.

> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +  "#mbox-cells":
> > +    const: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - "#mbox-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +    mailbox at 12c1c200 {
> > +        compatible = "aspeed,ast2700-mailbox";
> > +        reg = <0x12c1c200 0x100>, <0x12c1c300 0x100>;
> > +        interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > +        #mbox-cells = <1>;
> > +    };
> > --
> > 2.25.1
> >
Thanks for your help.

Regards
Jammy