[PATCH v2 05/10] ARM: dts: aspeed: system1: Add RGMII support

[Jacky Chou]

Hi Andrew,

I am ASPEED team.

>> system1 has 2 transceiver connected through the RGMII interfaces. Added
>> device tree entry to enable RGMII support.
>> 
>> ASPEED AST2600 documentation recommends using 'rgmii-rxid' as a
>> 'phy-mode' for mac0 and mac1 to enable the RX interface delay from the
>> PHY chip.
>
>Why?
>
>Does the mac0 TX clock have an extra long clock line on the PCB?
>
>Does the mac1 TX and RX clocks have extra long clock lines on the PCB?
>
>Anything but rgmii-id is in most cases wrong, so you need a really
>good explanation why you need to use something else. Something that
>shows you understand what is going on, and why what you have is
>correct.

Here I'll add some explanation.

In our design, we hope the TX and RX RGMII delay are configured by our MAC side.
We can control the TX/RX RGMII delay on MAC step by step, it is not a setting to delay to 2 ns.
We are not sure the all target PHYs are support for RX internal delay.

But ast2600 MAC1/2 delay cell cannot cover range to 2 ns, MAC 3/4 can do that.
Therefore, when using ast2600 MAC1/2, please enable the RX internal delay on the PHY side 
to make up for the part we cannot cover.

Summarize our design and we recommend.
AST2600 MAC1/2: rgmii-rxid
(RGMII with internal RX delay provided by the PHY, the MAC should not add an RX delay in this 
case)
AST2600 MAC3/4: rgmii
(RX and TX delays are added by the MAC when required)

rgmii and rgmii-rxid are referred from ethernet-controller.yaml file.

Thanks,
Jacky