[PATCH v1 3/3] soc: aspeed: lpc-pcc: Add PCC controller support

[Kevin Chen]

> On Mon, 2025-02-17 at 13:00 +0100, Krzysztof Kozlowski wrote:
> > On 17/02/2025 12:48, Kevin Chen wrote:
> > > +
> > > +       pcc->mdev.parent = dev;
> > > +       pcc->mdev.minor = MISC_DYNAMIC_MINOR;
> > > +       pcc->mdev.name = devm_kasprintf(dev, GFP_KERNEL, "%s%d",
> > > DEVICE_NAME,
> > >
> +                                       pcc->mdev_id);
> > > +       pcc->mdev.fops = &pcc_fops;
> > > +       rc = misc_register(&pcc->mdev);
> > > +       if (rc) {
> > > +               dev_err(dev, "Couldn't register misc device\n");
> > > +               goto err_free_kfifo;
> > > +       }
> >
> > You cannot expose user-space interfaces from SoC drivers. Use
> > appropriate subsystem for this with proper ABI documentation.
> >
> > See:
> > https://lore.kernel.org/all/bc5118f2-8982-46ff-bc75-d0c71475e909@app.f
> > astmail.com/
> > and more discussions on LKML
> 
> Further, drivers/misc/aspeed-lpc-snoop.c already exists:
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=
> 9f4f9ae81d0affc182f54dd00285ddb90e0b3ae1
> 
> Kevin: Did you consider reworking it?
Andrew: No, I do not rework it but add the post code capture driver using the SNOOP registers. As a result, I add some code in aspeed_a2600_15 to check the SNOOP enable bit. PCC driver probe abort if snoop is enabled. PCC is used for port I/O byte snooping over eSPI.


> 
> Nuvoton have a similar capability in their NPCM BMC SoC(s) with the "BPC"
> ("BIOS POST Code" controller). There should be some consensus on the binding
> and userspace interface.
> 
> Andrew