[PATCH v1 2/2] ARM: dts: aspeed: yosemite4: Add gpio pca9506 for CPLD IOE
Delphine CC Chiu
Delphine_CC_Chiu at wiwynn.com
Tue Sep 10 15:47:51 AEST 2024
From: Ricky CX Wu <ricky.cx.wu.wiwynn at gmail.com>
We use CPLD to emulate gpio pca9506 I/O expander on each server
boards.
Therefore, add pca9506 to probe driver for the CPLD I/O expander.
Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn at gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu at wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 252 ++++++++++++++++++
1 file changed, 252 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 08d32e42286e..9d2efb5f2f67 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -129,6 +129,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -147,6 +175,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -165,6 +221,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -183,6 +267,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -201,6 +313,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -219,6 +359,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -237,6 +405,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -255,6 +451,34 @@ mctp at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor at 40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -385,6 +609,34 @@ ipmb at 10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
+
+ gpio at 20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio at 23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&i2c14 {
--
2.25.1
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