[PATCH v4 6/6] gpio: aspeed: Add the flush write to ensure the write complete.

[Billy Tsai]

> > > >
> > > > On Thu, Sep 19, 2024 at 11:43 AM Billy Tsai <billy_tsai at aspeedtech.com> wrote:
> > > >
> > > > > Performing a dummy read ensures that the register write operation is fully
> > > > > completed, mitigating any potential bus delays that could otherwise impact
> > > > > the frequency of bitbang usage. E.g., if the JTAG application uses GPIO to
> > > > > control the JTAG pins (TCK, TMS, TDI, TDO, and TRST), and the application
> > > > > sets the TCK clock to 1 MHz, the GPIO’s high/low transitions will rely on
> > > > > a delay function to ensure the clock frequency does not exceed 1 MHz.
> > > > > However, this can lead to rapid toggling of the GPIO because the write
> > > > > operation is POSTed and does not wait for a bus acknowledgment.
> > > > >
> > > > > Signed-off-by: Billy Tsai <billy_tsai at aspeedtech.com>
> > > >
> > > > If this applies cleanly on mainline I think it should go into fixes as-is.
> > > >
> > > > Reviewed-by: Linus Walleij <linus.walleij at linaro.org>
> > > >
> > > > Yours,
> > > > Linus Walleij
> >
> > > I agree but it doesn't. :(
> >
> > > Billy: please send it separately and - while at it - use a C-style comment.
> >
> > > Bart
> >
> > Hi Linus Walleij and Bart,
> >
> > Sorry, I don’t quite understand the meaning of “send it separately.”
> > Does this mean I need to send this patch individually after the GPIO patch series has been accepted?
> >

> This is a fix, meaning: it should go upstream now and get backported
> to stable branches. The other patches from this series will go in the
> next merge window in two months or so. So send this as the first patch
> in the series with an appropriate Fixes: tag or even send it entirely
> independently from the rest.

> Bart

Got it. Thanks for your prompt response.
I will include this as the first patch in the next version.

Billy Tsai