[PATCH v3 5/9] ARM: dts: aspeed: Harma: Add spi-gpio
Peter Yin
peteryin.openbmc at gmail.com
Wed Feb 21 20:39:20 AEDT 2024
Add spi-gpio for tpm device.
Signed-off-by: Peter Yin <peteryin.openbmc at gmail.com>
---
.../dts/aspeed/aspeed-bmc-facebook-harma.dts | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
index 36aad01dda20..ca3052cce0e0 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
@@ -28,6 +28,8 @@ aliases {
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
+
+ spi1 = &spi_gpio;
};
chosen {
@@ -67,6 +69,25 @@ led-2 {
gpios = <&gpio0 124 GPIO_ACTIVE_HIGH>;
};
};
+
+ spi_gpio: spi-gpio {
+ status = "okay";
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-sck = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+ cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
+
+ tpmdev at 0 {
+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+ spi-max-frequency = <33000000>;
+ reg = <0>;
+ };
+ };
};
// HOST BIOS Debug
--
2.25.1
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