[PATCH v1 2/2] Add nct7363 in yosemite4 dts
Delphine CC Chiu
Delphine_CC_Chiu at wiwynn.com
Thu Apr 25 16:06:25 AEST 2024
ARM: dts: aspeed: yosemite4:
Add nct7363(0x21 and 0x23) in yosemite4.dts
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu at wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 144 ++++++++++++++++++
1 file changed, 144 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index e45293762316..06b709b0a706 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -467,6 +467,42 @@ channel at 5 {
};
};
+ hwmon0: hwmon at 21 {
+ compatible = "nuvoton,nct7363";
+ reg = <0x21>;
+ #pwm-cells = <2>;
+
+ fan-3 {
+ pwms = <&hwmon0 2 20000>;
+ tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan-4 {
+ pwms = <&hwmon0 5 20000>;
+ tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan-5 {
+ pwms = <&hwmon0 5 20000>;
+ tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan-0 {
+ pwms = <&hwmon0 0 20000>;
+ tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan-1 {
+ pwms = <&hwmon0 0 20000>;
+ tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan-2 {
+ pwms = <&hwmon0 2 20000>;
+ tach-ch = /bits/ 8 <0x0e>;
+ };
+ };
+
gpio at 22{
compatible = "ti,tca6424";
reg = <0x22>;
@@ -474,6 +510,42 @@ gpio at 22{
#gpio-cells = <2>;
};
+ hwmon1: hwmon at 23 {
+ compatible = "nuvoton,nct7363";
+ reg = <0x23>;
+ #pwm-cells = <2>;
+
+ fan-3 {
+ pwms = <&hwmon0 2 20000>;
+ tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan-4 {
+ pwms = <&hwmon0 5 20000>;
+ tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan-5 {
+ pwms = <&hwmon0 5 20000>;
+ tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan-0 {
+ pwms = <&hwmon0 0 20000>;
+ tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan-1 {
+ pwms = <&hwmon0 0 20000>;
+ tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan-2 {
+ pwms = <&hwmon0 2 20000>;
+ tach-ch = /bits/ 8 <0x0e>;
+ };
+ };
+
pwm at 2f{
compatible = "maxim,max31790";
#address-cells = <1>;
@@ -537,6 +609,42 @@ channel at 5 {
};
};
+ hwmon2: hwmon at 21 {
+ compatible = "nuvoton,nct7363";
+ reg = <0x21>;
+ #pwm-cells = <2>;
+
+ fan-3 {
+ pwms = <&hwmon2 2 20000>;
+ tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan-4 {
+ pwms = <&hwmon2 5 20000>;
+ tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan-5 {
+ pwms = <&hwmon2 5 20000>;
+ tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan-0 {
+ pwms = <&hwmon2 0 20000>;
+ tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan-1 {
+ pwms = <&hwmon2 0 20000>;
+ tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan-2 {
+ pwms = <&hwmon2 2 20000>;
+ tach-ch = /bits/ 8 <0x0e>;
+ };
+ };
+
gpio at 22{
compatible = "ti,tca6424";
reg = <0x22>;
@@ -544,6 +652,42 @@ gpio at 22{
#gpio-cells = <2>;
};
+ hwmon3: hwmon at 23 {
+ compatible = "nuvoton,nct7363";
+ reg = <0x23>;
+ #pwm-cells = <2>;
+
+ fan-3 {
+ pwms = <&hwmon3 2 20000>;
+ tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan-4 {
+ pwms = <&hwmon3 5 20000>;
+ tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan-5 {
+ pwms = <&hwmon3 5 20000>;
+ tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan-0 {
+ pwms = <&hwmon3 0 20000>;
+ tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan-1 {
+ pwms = <&hwmon3 0 20000>;
+ tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan-2 {
+ pwms = <&hwmon3 2 20000>;
+ tach-ch = /bits/ 8 <0x0e>;
+ };
+ };
+
pwm at 2f{
compatible = "maxim,max31790";
#address-cells = <1>;
--
2.25.1
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