[v6 2/4] dt-bindings: hwmon: Add ASPEED TACH Control documentation
Billy Tsai
billy_tsai at aspeedtech.com
Thu Jun 8 16:21:23 AEST 2023
> The code says:
> In Aspeed AST2600 SoC features 16 TACH controllers, with each
> controller capable of supporting up to 1 input.
> which is a bit different. I guess there are no examples anymore,
> but I'd really like to see how this looks like in the devicetree file,
> and how the driver is supposed to distinguish/select the 16 inputs.
Hi Roeck,
The node in the devicetree file will looks like following:
tach0: tach0 at 1e610008 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610008 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach0_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach1: tach1 at 1e610018 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610018 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach1_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach2: tach2 at 1e610028 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610028 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach2_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach3: tach3 at 1e610038 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610038 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach3_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach4: tach4 at 1e610048 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610048 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach4_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach5: tach5 at 1e610058 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610058 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach5_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach6: tach6 at 1e610068 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610068 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach6_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach7: tach7 at 1e610078 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610078 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach7_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach8: tach8 at 1e610088 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610088 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach8_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach9: tach9 at 1e610098 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e610098 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach9_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach10: tach10 at 1e6100A8 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e6100A8 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach10_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach11: tach11 at 1e6100B8 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e6100B8 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach11_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach12: tach12 at 1e6100C8 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e6100C8 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach12_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach13: tach13 at 1e6100D8 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e6100D8 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach13_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach14: tach14 at 1e6100E8 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e6100E8 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach14_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
tach15: tach15 at 1e6100F8 {
compatible = "aspeed,ast2600-tach";
reg = <0x1e6100F8 0x8>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tach15_default>;
clocks = <&syscon ASPEED_CLK_AHB>;
resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
Thanks
Best Regards,
Billy Tsai
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