[PATCH v3 3/5] gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support
andy.shevchenko at gmail.com
Thu Jun 3 21:05:53 AEST 2021
On Thu, Jun 3, 2021 at 1:19 PM Steven Lee <steven_lee at aspeedtech.com> wrote:
> AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
> with 80 pins.
> In the current driver, the maximum number of gpio pins of SoC is hardcoded
> as 80 and the gpio pin count mask for GPIO Configuration register is
> hardcode as GENMASK(9,6). In addition, some functions uses the hardcoded
> value to calculate the gpio offset.
> The patch adds ast2600 compatibles and platform data that includes the
> max number of gpio pins supported by ast2600 and gpio pin count mask for
> GPIO Configuration register.
> The patch also modifies some functions to pass aspeed_sgpio struct for
> calculating gpio offset wihtout using the hardcoded value.
> +#include <linux/of_device.h>
> +#define GPIO_OFFSET(x) ((x) & 0x1f)
> + pdata = of_device_get_match_data(&pdev->dev);
I guess you may replace all those of_*() to the corresponding
device_*() or fwnode_*() calls.
With Best Regards,
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