Re: [PATCH] ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address
andrew at aj.id.au
Thu Jan 28 10:16:25 AEDT 2021
On Thu, 28 Jan 2021, at 04:53, Konstantin Aladyshev wrote:
> AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
> Currently ASPEED controller snoops only 0x80 port and therefore captures
> only the lower byte of each POST code.
> Enable secondary LPC snooping address to capture the higher byte of POST
> Signed-off-by: Konstantin Aladyshev <aladyshev22 at gmail.com>
Reviewed-by: Andrew Jeffery <andrew at aj.id.au>
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