[PATCH 4/4] pinctrl: aspeed-g5: Fix LPC register offsets

Linus Walleij linus.walleij at linaro.org
Tue Sep 29 22:42:22 AEST 2020

On Fri, Sep 11, 2020 at 5:47 AM Chia-Wei, Wang
<chiawei_wang at aspeedtech.com> wrote:

> The LPC register offsets are fixed to adapt to the LPC DTS change,
> where the LPC partitioning is removed.
> Signed-off-by: Chia-Wei, Wang <chiawei_wang at aspeedtech.com>

I can apply this one patch if I get a review from one of the
Aspeed pinctrl maintainer.


Linus Walleij

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