[PATCH v3 3/3] ARM: dts: aspeed: Add silicon id node

Andrew Jeffery andrew at aj.id.au
Thu Sep 24 16:57:43 AEST 2020

On Mon, 21 Sep 2020, at 18:46, Joel Stanley wrote:
> This register describes the silicon id and chip unique id. It varies
> between CPU revisions, but is always part of the SCU.
> Signed-off-by: Joel Stanley <joel at jms.id.au>

Reviewed-by: Andrew Jeffery <andrew at aj.id.au>

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