[PATCH v3 3/3] ARM: dts: aspeed: Add silicon id node

[Andrew Jeffery]

On Mon, 21 Sep 2020, at 18:46, Joel Stanley wrote:
> This register describes the silicon id and chip unique id. It varies
> between CPU revisions, but is always part of the SCU.
> 
> Signed-off-by: Joel Stanley <joel at jms.id.au>

Reviewed-by: Andrew Jeffery <andrew at aj.id.au>