[RESEND PATCH v4 2/2] uacce: add uacce driver

zhangfei.gao at foxmail.com zhangfei.gao at foxmail.com
Mon Oct 14 17:53:45 AEDT 2019

On 2019/10/10 下午8:33, Greg Kroah-Hartman wrote:
> On Wed, Oct 09, 2019 at 11:21:42PM +0800, Zhangfei Gao wrote:
>> From: Kenneth Lee <liguozhu at hisilicon.com>
>> Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
>> provide Shared Virtual Addressing (SVA) between accelerators and processes.
>> So accelerator can access any data structure of the main cpu.
>> This differs from the data sharing between cpu and io device, which share
>> data content rather than address.
>> Since unified address, hardware and user space of process can share the
>> same virtual address in the communication.
>> Uacce create a chrdev for every registration, the queue is allocated to
>> the process when the chrdev is opened. Then the process can access the
>> hardware resource by interact with the queue file. By mmap the queue
>> file space to user space, the process can directly put requests to the
>> hardware without syscall to the kernel space.
>> Signed-off-by: Kenneth Lee <liguozhu at hisilicon.com>
>> Signed-off-by: Zaibo Xu <xuzaibo at huawei.com>
>> Signed-off-by: Zhou Wang <wangzhou1 at hisilicon.com>
>> Signed-off-by: Zhangfei Gao <zhangfei.gao at linaro.org>
> No one is using these new apis you are creating, so we can not judge if
> they are correct or not.  Please submit this as a patch series with a
> driver that is actually going to use this api.
Thanks Greg,
Just sent v5 with an example of using uacce register interface.
Would you mind take a look.


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