[RFCv3 PATCH 1/6] uacce: Add documents for WarpDrive/uacce

Jason Gunthorpe jgg at ziepe.ca
Tue Nov 20 14:29:39 AEDT 2018

On Tue, Nov 20, 2018 at 11:07:02AM +0800, Kenneth Lee wrote:
> On Mon, Nov 19, 2018 at 11:49:54AM -0700, Jason Gunthorpe wrote:
> > Date: Mon, 19 Nov 2018 11:49:54 -0700
> > From: Jason Gunthorpe <jgg at ziepe.ca>
> > To: Kenneth Lee <liguozhu at hisilicon.com>
> > CC: Leon Romanovsky <leon at kernel.org>, Kenneth Lee <nek.in.cn at gmail.com>,
> >  Tim Sell <timothy.sell at unisys.com>, linux-doc at vger.kernel.org, Alexander
> >  Shishkin <alexander.shishkin at linux.intel.com>, Zaibo Xu
> >  <xuzaibo at huawei.com>, zhangfei.gao at foxmail.com, linuxarm at huawei.com,
> >  haojian.zhuang at linaro.org, Christoph Lameter <cl at linux.com>, Hao Fang
> >  <fanghao11 at huawei.com>, Gavin Schenk <g.schenk at eckelmann.de>, RDMA mailing
> >  list <linux-rdma at vger.kernel.org>, Zhou Wang <wangzhou1 at hisilicon.com>,
> >  Doug Ledford <dledford at redhat.com>, Uwe Kleine-König
> >  <u.kleine-koenig at pengutronix.de>, David Kershner
> >  <david.kershner at unisys.com>, Johan Hovold <johan at kernel.org>, Cyrille
> >  Pitchen <cyrille.pitchen at free-electrons.com>, Sagar Dharia
> >  <sdharia at codeaurora.org>, Jens Axboe <axboe at kernel.dk>,
> >  guodong.xu at linaro.org, linux-netdev <netdev at vger.kernel.org>, Randy Dunlap
> >  <rdunlap at infradead.org>, linux-kernel at vger.kernel.org, Vinod Koul
> >  <vkoul at kernel.org>, linux-crypto at vger.kernel.org, Philippe Ombredanne
> >  <pombredanne at nexb.com>, Sanyog Kale <sanyog.r.kale at intel.com>, "David S.
> >  Miller" <davem at davemloft.net>, linux-accelerators at lists.ozlabs.org
> > Subject: Re: [RFCv3 PATCH 1/6] uacce: Add documents for WarpDrive/uacce
> > User-Agent: Mutt/1.9.4 (2018-02-28)
> > Message-ID: <20181119184954.GB4890 at ziepe.ca>
> > 
> > On Mon, Nov 19, 2018 at 05:14:05PM +0800, Kenneth Lee wrote:
> >  
> > > If the hardware cannot share page table with the CPU, we then need to have
> > > some way to change the device page table. This is what happen in ODP. It
> > > invalidates the page table in device upon mmu_notifier call back. But this cannot
> > > solve the COW problem: if the user process A share a page P with device, and A 
> > > forks a new process B, and it continue to write to the page. By COW, the
> > > process B will keep the page P, while A will get a new page P'. But you have
> > > no way to let the device know it should use P' rather than P.
> > 
> > Is this true? I thought mmu_notifiers covered all these cases.
> > 
> > The mm_notifier for A should fire if B causes the physical address of
> > A's pages to change via COW. 
> > 
> > And this causes the device page tables to re-synchronize.
> I don't see such code. The current do_cow_fault() implemenation has nothing to
> do with mm_notifer.

Well, that sure sounds like it would be a bug in mmu_notifiers..

But considering Jean's SVA stuff seems based on mmu notifiers, I have
a hard time believing that it has any different behavior from RDMA's
ODP, and if it does have different behavior, then it is probably just
a bug in the ODP implementation.

> > > In WarpDrive/uacce, we make this simple. If you support IOMMU and it support
> > > SVM/SVA. Everything will be fine just like ODP implicit mode. And you don't need
> > > to write any code for that. Because it has been done by IOMMU framework. If it
> > 
> > Looks like the IOMMU code uses mmu_notifier, so it is identical to
> > IB's ODP. The only difference is that IB tends to have the IOMMU page
> > table in the device, not in the CPU.
> > 
> > The only case I know if that is different is the new-fangled CAPI
> > stuff where the IOMMU can directly use the CPU's page table and the
> > IOMMU page table (in device or CPU) is eliminated.
> Yes. We are not focusing on the current implementation. As mentioned in the
> cover letter. We are expecting Jean Philips' SVA patch:
> git://linux-arm.org/linux-jpb.

This SVA stuff does not look comparable to CAPI as it still requires
maintaining seperate IOMMU page tables.

Also, those patches from Jean have a lot of references to
mmu_notifiers (ie look at iommu_mmu_notifier).

Are you really sure it is actually any different at all?

> > Anyhow, I don't think a single instance of hardware should justify an
> > entire new subsystem. Subsystems are hard to make and without multiple
> > hardware examples there is no way to expect that it would cover any
> > future use cases.
> Yes. That's our first expectation. We can keep it with our driver. But because
> there is no user driver support for any accelerator in mainline kernel. Even the
> well known QuickAssit has to be maintained out of tree. So we try to see if
> people is interested in working together to solve the problem.

Well, you should come with patches ack'ed by these other groups.

> > If all your driver needs is to mmap some PCI bar space, route
> > interrupts and do DMA mapping then mediated VFIO is probably a good
> > choice. 
> Yes. That is what is done in our RFCv1/v2. But we accepted Jerome's opinion and
> try not to add complexity to the mm subsystem.

Why would a mediated VFIO driver touch the mm subsystem? Sounds like
you don't have a VFIO driver if it needs to do stuff like that...

> > If it needs to do a bunch of other stuff, not related to PCI bar
> > space, interrupts and DMA mapping (ie special code for compression,
> > crypto, AI, whatever) then you should probably do what Jerome said and
> > make a drivers/char/hisillicon_foo_bar.c that exposes just what your
> > hardware does.
> Yes. If no other accelerator driver writer is interested. That is the
> expectation:)

I don't think it matters what other drivers do. 

If your driver does not need any other kernel code then VFIO is
sensible. In this kind of world you will probably have a RDMA-like
userspace driver that can bring this to a common user space API, even
if one driver use VFIO and a different driver uses something else.

> You create some connections (queues) to NIC, RSA, and AI engine. Then you got
> data direct from the NIC and pass the pointer to RSA engine for decryption. The
> CPU then finish some data taking or operation and then pass through to the AI
> engine for CNN calculation....This will need a place to maintain the same
> address space by some means.

How is this any different from what we have today? 

SVA is not something even remotely new, IB has been doing various
versions of it for 20 years.


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