[PATCH] clk/mpc85xx: Update the compatible string

[Yuantian.Tang at freescale.com]

From: Tang Yuantian <yuantian.tang at freescale.com>

The compatible string of clock is changed from *-2 to *-2.0
on chassis 2. So updated it accordingly.

Signed-off-by: Tang Yuantian <Yuantian.Tang at freescale.com>
---
 drivers/clk/clk-ppc-corenet.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index a2d483f..e958707 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -260,7 +260,7 @@ static int __init ppc_corenet_clk_probe(struct platform_device *pdev)
 
 static const struct of_device_id ppc_clk_ids[] __initconst = {
 	{ .compatible = "fsl,qoriq-clockgen-1.0", },
-	{ .compatible = "fsl,qoriq-clockgen-2", },
+	{ .compatible = "fsl,qoriq-clockgen-2.0", },
 	{}
 };
 
-- 
1.8.0