[RFC v2 09/12] ARM: mvebu: Add BootROM to Armada 370/XP device tree

[Ezequiel Garcia]

In order to access the SoC BootROM, we need to declare a mapping
(through a ranges property). The mbus driver will use this property
to allocate a suitable address decoding window.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia at free-electrons.com>
---
 arch/arm/boot/dts/armada-370-xp.dtsi | 2 ++
 arch/arm/boot/dts/armada-370.dtsi    | 9 ++++++++-
 arch/arm/boot/dts/armada-xp.dtsi     | 9 ++++++++-
 3 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 633534dd..4ae5eb5 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -16,6 +16,8 @@
  * 370 and Armada XP SoC.
  */
 
+#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
+
 /include/ "skeleton64.dtsi"
 
 / {
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 937db5d..f46abd6 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -31,7 +31,14 @@
 	soc {
 		compatible = "marvell,armada370-mbus";
 		reg = <0xd0020000 0x100>, <0xd0020180 0x20>;
-		ranges = <0xffff0001 0 0xd0000000 0x100000>;
+		ranges = <0xffff0001 0 0xd0000000 0x100000
+			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+		bootrom {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 MBUS_ID(0x01, 0xe0) 0 0x100000>;
+		};
 
 		internal-regs {
 			system-controller at 18200 {
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index dda8588..efb256d 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -25,7 +25,14 @@
 	soc {
 		compatible = "marvell,armadaxp-mbus";
 		reg = <0 0xd0020000 0 0x100>, <0 0xd0020180 0 0x20>;
-		ranges = <0xffff0001 0 0 0xd0000000 0x100000>;
+		ranges = <0xffff0001 0 0 0xd0000000 0x100000
+			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
+
+		bootrom {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 MBUS_ID(0x01, 0x1d) 0 0x100000>;
+		};
 
 		internal-regs {
 			L2: l2-cache {
-- 
1.8.1.5