[PATCH v2 06/10] mmc: omap_hsmmc: add support for pbias configuration in dt

[Lee Jones]

On Thu, 13 Jun 2013, Linus Walleij wrote:

> On Thu, Jun 6, 2013 at 9:14 PM, Balaji T K <balajitk at ti.com> wrote:
> 
> > PBIAS register configuration is based on the regulator voltage
> > which supplies these pbias cells, sd i/o pads.
> > With PBIAS register address and bit definitions different across
> > omap[3,4,5], Simplify PBIAS configuration under three different
> > regulator voltage levels - O V, 1.8 V, 3 V. Corresponding pinctrl states
> > are defined as pbias_off, pbias_1v8, pbias_3v.
> >
> > pinctrl state mmc_init is used for configuring speed mode, loopback clock
> > (in devconf0/devconf1/prog_io1 register for omap3) and pull strength
> > configuration (in control_mmc1 for omap4)
> >
> > Signed-off-by: Balaji T K <balajitk at ti.com>
> 
> You *need* Lee Jones and Mark Brown to review this.
> Maybe Laurent has something to add too.
> 
> Ux500 had the very same thing, and there this was solved using
> a GPIO regulator for "vqmmc" a level-shifter. I vaguely remember
> Laurent doing something similar with the SH stuff.

I haven't seem much of this patch-set, but this certainly looks like
it should be handled by a GPIO regulator instead of pinctrl. States
are easily declared in a 'struct gpio_regulator_state', which the
framework then uses to set the correct pins for the required voltage.

And yes, 'vqmmc' is a good place to store the this regulator.

-- 
Lee Jones
Linaro ST-Ericsson Landing Team Lead
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