[PATCH V3] regulators: anatop: add set_voltage_time_sel interface
Mark Brown
broonie at opensource.wolfsonmicro.com
Thu Jan 31 17:40:42 EST 2013
On Thu, Jan 31, 2013 at 11:23:53AM -0500, Anson Huang wrote:
> some of anatop's regulators(cpu, vddpu and vddsoc) have
> register settings about LDO's step time, which will impact
> the LDO ramp up speed, need to use set_voltage_time_sel
> interface to add necessary delay everytime LDOs' voltage
> is increased.
Applied, thanks. It does seem like...
> +#define LDO_RAMP_UP_UNIT_IN_CYCLES 64 /* 64 cycles per step */
> +#define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
...this ought to go into device tree too (at least the oscillator
frequency).
Please do also use subject lines appropriate to the subsystem.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.ozlabs.org/pipermail/devicetree-discuss/attachments/20130131/301f3dae/attachment.sig>
More information about the devicetree-discuss
mailing list