[PATCH 1/2] i2c-core: Add gpio based bus arbitration implementation

[Wolfram Sang]

On Thu, Jan 24, 2013 at 07:18:47PM +0800, Mark Brown wrote:
> On Thu, Jan 24, 2013 at 12:13:29PM +0100, Wolfram Sang wrote:
> > On Sat, Dec 15, 2012 at 11:21:36PM +0900, Mark Brown wrote:
> 
> > > also get things like read operations which appear as multiple
> > > transactions on the I2C bus so require something higher level than what
> > > multi-master provides.
> 
> > I don't get what you mean here. Can you elaborate?
> 
> A read is typically implemented as a write of the register address
> followed by a read of the value, usually with the ability to free the
> bus in between.  If two devices attempt to access the register map
> simultaneously this results in the address going wrong.

Could happen. But in what situations will one not use repeated start
here? Especially when designing a multi-master bus?

-- 
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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