[PATCH 1/5] capemgr: Beaglebone DT overlay based cape manager

[Linus Walleij]

On Thu, Jan 17, 2013 at 11:35 AM, Arnd Bergmann <arnd at arndb.de> wrote:
> On Thursday 17 January 2013, Linus Walleij wrote:
>> Each logic module / plug-in card spawn a set of struct amba_device
>> primecells.
>>
>> Each of them need clocks and interrupts. These are then cascaded
>> from the clocks/irqs on the main board.
>
> But can they be cascaded from any clocks and irqs on the mainboard,
> or just a few selected ones that are connected to the plug-in
> module?

Just those.

> If you can describe which IRQs and clocks are routed to the
> connector, then everything below it can be locally described
> again.

Hm yes...

> For the interrupts, you can use an
> interrupt-map/interrupt-map-mask pair,

Actually it is a single IRQ and then there is a cascaded VIC inside
the module.

> and I'd assume for
> the clocks, you just need to provide the right labels.

Yes sounds reasonable.

I'll deal with it when I get there...

Yours,
Linus Walleij