RFC: Static memory controller node description

[Michal Simek]

Hi guys,

we want to add static memory controller driver for xilinx zynq to the
linux kernel. (It will go to drivers/memory/ folder)
Just need to clear dts fragment which describe it.

It is compatible with pl353 with 2 interfaces when only one interface
can be used.
Nand, nor and sram memories are supported. Driver will do additional
setup for NAND and power management.

I am using extended compatible property based on
Documentation/devicetree/bindings/arm/primecell.txt. Is it correct?

Nand case (we have special driver for nand) - interrupts are used only
in connection with nand.

smc at 0xe000e000 {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "xlnx,ps7-smc", "arm,pl353", "arm,primecell";
	reg = <0xe000e000 0x1000>;
	interrupts = <0 18 4>;
	interrupt-parent = <&ps7_scugic_0>;
	ranges;
	nand at e1000000 {
		compatible = "xlnx,ps7-nand-1.00.a";
		reg = <0xe1000000 0x1000000>;
		xlnx,nand-width = <16>;
	}
}

or this one for NOR

smc at 0xe000e000 {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "xlnx,ps7-smc", "arm,pl353", "arm,primecell";
	reg = <0xe000e000 0x1000>;
	ranges;
	nor: nor at e2000000 {
		compatible = "cfi-flash";
		reg = <0xE2000000 0x2000000>;
		bank-width = <1>;
	}
}

Can you see any problem with these dts fragments?

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian