Active low GPIOs (was [PATCH v1 1/4] i2c: mux: Add i2c-arbitrator 'mux' driver)
Linus Walleij
linus.walleij at linaro.org
Sat Feb 16 07:58:13 EST 2013
On Fri, Feb 15, 2013 at 9:42 PM, Stephen Warren <swarren at wwwdotorg.org> wrote:
> On 02/15/2013 01:34 PM, Linus Walleij wrote:
>> 0xca000000 + 4 is just the second 32bit word in the system
>> controller. This address range and that very word is used
>> for various stuff, so it's not like a general-purpose GPIO
>> or anything, it's just that one pin being readable throgh that
>> very bit.
>
> Surely a GPIO is exactly what that is...
>
> It might be annoying to create a GPIO controller driver for just that,
> but that seems like the simplest way to implement that HW from a device
> tree perspective. With DT, it'd be painful to plug in that board
> callback into the platform data there.
Yeah well, I'll get to it sooner or later.
I have seen cases of cherry-picked registers being routed
to one driver etc (like an MFD device) but this is the first
instance where we need to cherry-pick individual bits over to
a separate driver.
This will be a 1-bit, input-only gpio pin, npins = 1....
But hey, they buils spaceships for just one person so why
not :-)
Yours,
Linus Walleij
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