[PATCH v2 19/20] tegra: fdt: Add EMC data for Tegra2 Seaboard
Simon Glass
sjg at chromium.org
Sat Jan 14 08:51:43 EST 2012
On Fri, Jan 13, 2012 at 1:35 PM, Simon Glass <sjg at chromium.org> wrote:
> This adds timings for T20 and T25 Seaboards, using the bindings found here:
>
> http://patchwork.ozlabs.org/patch/132928/
>
> We supply both full speed options for normal running, and half speed options
> for testing / development.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> board/nvidia/dts/tegra2-seaboard.dts | 73 ++++++++++++++++++++++++++++++++++
> 1 files changed, 73 insertions(+), 0 deletions(-)
>
> diff --git a/board/nvidia/dts/tegra2-seaboard.dts b/board/nvidia/dts/tegra2-seaboard.dts
> index d2cc428..b114f5f 100644
> --- a/board/nvidia/dts/tegra2-seaboard.dts
> +++ b/board/nvidia/dts/tegra2-seaboard.dts
> @@ -54,4 +54,77 @@
> status = "disabled";
> };
>
> + emc at 7000f400 {
> + emc-table at 166500 {
> + reg = <166500>;
> + compatible = "nvidia,tegra20-emc-table";
> + clock-frequency = < 166500 >;
> + nvidia,emc-registers = < 0x0000000a 0x00000021
> + 0x00000008 0x00000003 0x00000004 0x00000004
> + 0x00000002 0x0000000c 0x00000003 0x00000003
> + 0x00000002 0x00000001 0x00000004 0x00000005
> + 0x00000004 0x00000009 0x0000000d 0x000004df
> + 0x00000000 0x00000003 0x00000003 0x00000003
> + 0x00000003 0x00000001 0x0000000a 0x000000c8
> + 0x00000003 0x00000006 0x00000004 0x0000000f
> + 0x00000002 0x00000000 0x00000000 0x00000002
> + 0x00000000 0x00000000 0x00000083 0xa04004ae
> + 0x007fd010 0x00000000 0x00000000 0x00000000
> + 0x00000000 0x00000000 0x00000000 0x00000000 >;
> + };
> + emc-table at 333000 {
> + reg = <333000>;
> + compatible = "nvidia,tegra20-emc-table";
> + clock-frequency = < 333000 >;
> + nvidia,emc-registers = < 0x00000014 0x00000041
> + 0x0000000f 0x00000005 0x00000004 0x00000005
> + 0x00000003 0x0000000c 0x00000005 0x00000005
> + 0x00000003 0x00000001 0x00000004 0x00000005
> + 0x00000004 0x00000009 0x0000000d 0x000009ff
> + 0x00000000 0x00000003 0x00000003 0x00000005
> + 0x00000005 0x00000001 0x0000000f 0x000000c8
> + 0x00000003 0x0000000c 0x00000006 0x0000000f
> + 0x00000002 0x00000000 0x00000000 0x00000002
> + 0x00000000 0x00000000 0x00000083 0xe034048b
> + 0x007e8010 0x00000000 0x00000000 0x00000000
> + 0x00000000 0x00000000 0x00000000 0x00000000>;
> + };
> +
> + emc-table at 190000 {
> + reg = < 190000 >;
> + compatible = "nvidia,tegra20-emc-table";
> + clock-frequency = < 190000 >;
> + nvidia,emc-registers = < 0x0000000c 0x00000026
> + 0x00000009 0x00000003 0x00000004 0x00000004
> + 0x00000002 0x0000000c 0x00000003 0x00000003
> + 0x00000002 0x00000001 0x00000004 0x00000005
> + 0x00000004 0x00000009 0x0000000d 0x0000059f
> + 0x00000000 0x00000003 0x00000003 0x00000003
> + 0x00000003 0x00000001 0x0000000b 0x000000c8
> + 0x00000003 0x00000007 0x00000004 0x0000000f
> + 0x00000002 0x00000000 0x00000000 0x00000002
> + 0x00000000 0x00000000 0x00000083 0xa06204ae
> + 0x007dc010 0x00000000 0x00000000 0x00000000
> + 0x00000000 0x00000000 0x00000000 0x00000000 >;
> + };
> + emc-table at 380000 {
> + reg = < 380000 >;
> + compatible = "nvidia,tegra20-emc-table";
> + clock-frequency = < 380000 >;
> + nvidia,emc-registers = < 0x00000017 0x0000004b
> + 0x00000012 0x00000006 0x00000004 0x00000005
> + 0x00000003 0x0000000c 0x00000006 0x00000006
> + 0x00000003 0x00000001 0x00000004 0x00000005
> + 0x00000004 0x00000009 0x0000000d 0x00000b5f
> + 0x00000000 0x00000003 0x00000003 0x00000006
> + 0x00000006 0x00000001 0x00000011 0x000000c8
> + 0x00000003 0x0000000e 0x00000007 0x0000000f
> + 0x00000002 0x00000000 0x00000000 0x00000002
> + 0x00000000 0x00000000 0x00000083 0xe044048b
> + 0x007d8010 0x00000000 0x00000000 0x00000000
> + 0x00000000 0x00000000 0x00000000 0x00000000 >; emc-table at 190000 {
Oh dear. I will fix this next revision...
> + };
> + };
> +};
> +
> };
> --
> 1.7.7.3
>
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