[PATCHv5 4/4] ARM: picoxcell: use new Synopsys Designware GPIO binding
Jamie Iles
jamie at jamieiles.com
Thu Jan 5 12:23:39 EST 2012
Use the DesignWare specific binding rather than the generic binding
which isn't supported in mainline.
Signed-off-by: Jamie Iles <jamie at jamieiles.com>
---
arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 19 ++++++++-----------
arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 28 +++++++++++-----------------
2 files changed, 19 insertions(+), 28 deletions(-)
diff --git a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi b/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
index f0a8c20..a247812 100644
--- a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
+++ b/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
@@ -169,28 +169,25 @@
reg = <0x20000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- reg-io-width = <4>;
banka: gpio-controller at 0 {
compatible = "snps,dw-apb-gpio-bank";
gpio-controller;
#gpio-cells = <2>;
- gpio-generic,nr-gpio = <8>;
-
- regoffset-dat = <0x50>;
- regoffset-set = <0x00>;
- regoffset-dirout = <0x04>;
+ nr-gpio = <8>;
+ reg = <0>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&vic1>;
+ interrupts = <0 1 2 3 4 5 6 7>;
};
bankb: gpio-controller at 1 {
compatible = "snps,dw-apb-gpio-bank";
gpio-controller;
#gpio-cells = <2>;
- gpio-generic,nr-gpio = <8>;
-
- regoffset-dat = <0x54>;
- regoffset-set = <0x0c>;
- regoffset-dirout = <0x10>;
+ nr-gpio = <8>;
+ reg = <1>;
};
};
diff --git a/arch/arm/boot/dts/picoxcell-pc3x3.dtsi b/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
index daa962d..96f049f 100644
--- a/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
+++ b/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
@@ -252,39 +252,33 @@
reg = <0x20000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- reg-io-width = <4>;
banka: gpio-controller at 0 {
compatible = "snps,dw-apb-gpio-bank";
gpio-controller;
+ reg = <0>;
#gpio-cells = <2>;
- gpio-generic,nr-gpio = <8>;
-
- regoffset-dat = <0x50>;
- regoffset-set = <0x00>;
- regoffset-dirout = <0x04>;
+ nr-gpio = <8>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&vic1>;
+ interrupts = <0 1 2 3 4 5 6 7>;
};
bankb: gpio-controller at 1 {
compatible = "snps,dw-apb-gpio-bank";
gpio-controller;
+ reg = <1>;
#gpio-cells = <2>;
- gpio-generic,nr-gpio = <16>;
-
- regoffset-dat = <0x54>;
- regoffset-set = <0x0c>;
- regoffset-dirout = <0x10>;
+ nr-gpio = <16>;
};
- bankd: gpio-controller at 2 {
+ bankd: gpio-controller at 3 {
compatible = "snps,dw-apb-gpio-bank";
gpio-controller;
+ reg = <3>;
#gpio-cells = <2>;
- gpio-generic,nr-gpio = <30>;
-
- regoffset-dat = <0x5c>;
- regoffset-set = <0x24>;
- regoffset-dirout = <0x28>;
+ nr-gpio = <30>;
};
};
--
1.7.5.4
More information about the devicetree-discuss
mailing list