[RFC 2/5] ARM: dts: Add Cross Trigger Interface binding

Mark Rutland mark.rutland at arm.com
Tue Dec 18 03:20:55 EST 2012


On Thu, Dec 13, 2012 at 07:21:30PM +0000, Jon Hunter wrote:
> 
> On 12/13/2012 11:41 AM, Will Deacon wrote:
> > On Wed, Dec 12, 2012 at 09:43:05PM +0000, Jon Hunter wrote:
> >> Adds a device-tree binding for the ARM Cross Trigger Interface (CTI).
> >> The ARM Cross Trigger Interface provides a way to route events between
> >> processor modules. For example, on OMAP4430 we use the CTI module to
> >> route PMU events to the GIC interrupt module.
> >>
> >> Signed-off-by: Jon Hunter <jon-hunter at ti.com>
> >> ---
> >>  Documentation/devicetree/bindings/arm/cti.txt |   32 +++++++++++++++++++++++++
> >>  1 file changed, 32 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/arm/cti.txt
> >>
> >> diff --git a/Documentation/devicetree/bindings/arm/cti.txt b/Documentation/devicetree/bindings/arm/cti.txt
> >> new file mode 100644
> >> index 0000000..4a0e2d3
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/arm/cti.txt
> >> @@ -0,0 +1,32 @@
> >> +* ARM Cross Trigger Interface (CTI)
> >> +
> >> +The ARM Cross Trigger Interface provides a way to route events between
> >> +processor modules. For example, debug events from one processor can be
> >> +broadcasted to other processors. The events that can be routed between
> >> +processors are specific to the device.
> >> +
> >> +Required properties:
> >> +
> >> +- compatible:			Should be "arm,primecell".
> >> +- interrupts:			Interrupt associated with CTI module.
> >> +- reg:				Contains timer register address range (base
> >> +				address and length).
> >> +- arm,cti-name:			A unique name for the CTI module, that will be
> >> +				used when requesting the CTI module instance.
> >> +
> >> +
> >> +Optional properties:
> >> +
> >> +- arm-primecell-periphid:	Primecell peripheral ID associated with CTI
> >> +				module.
> > 
> > For multi-cluster systems, I wouldn't be surprised to see multiple CTI
> > instances, each with different CPU affinities. Can we include an affinity
> > property following Mark's proposed binding?
> > 
> >   http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/137290.html
> 
> Yes I can take a look. Would something like that be applicable to pmu as
> well or is that unlikely to have different affinities? I am just
> wondering if there is something that we should implement in general for
> the various primecell components.

Do you mean for describing the PMU's affinity to the perf subsystem or its
wiring to the CTI?

It's certainly applicable for the former; I've been working on a series to
enable support for the PMUs in both clusters in a A15x2 A7x3 coretile using the
binding, and I intend to post a series shortly. I'm not sure about the latter,
as I don't have much of an understanding about the CTI.

I'm not sure how many other components have affinity concerns, but the
intention is for the binding to be reusable.

> 
> Cheers
> Jon
> 

Thanks,
Mark.



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