[PATCH 7/7] dt: update fsl-esdhc bindings for imx esdhc OF support
Shawn Guo
shawn.guo at linaro.org
Tue Mar 15 01:25:59 EST 2011
Signed-off-by: Shawn Guo <shawn.guo at linaro.org>
---
.../devicetree/bindings/mmc/fsl-esdhc.txt | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
index 64bcb8b..fac52e2 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -9,7 +9,10 @@ Required properties:
- reg : should contain eSDHC registers location and length.
- interrupts : should contain eSDHC interrupt.
- interrupt-parent : interrupt source phandle.
- - clock-frequency : specifies eSDHC base clock frequency.
+ - clock-frequency : (mandatory for powerpc platform) specifies
+ eSDHC base clock frequency.
+ - bus-clock : (mandatory for arm platform) specifies phandle of
+ eSDHC clock provider.
- sdhci,wp-inverted : (optional) specifies that eSDHC controller
reports inverted write-protect state;
- sdhci,1-bit-only : (optional) specifies that a controller can
--
1.7.1
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