[PATCH] powerpc/85xx:DTS: Fix tbi node location for Px020RDB

Grant Likely grant.likely at secretlab.ca
Thu Jun 23 02:34:34 EST 2011


On Wed, Jun 22, 2011 at 5:34 AM, Kumar Gala <galak at kernel.crashing.org> wrote:
>
> On Jun 7, 2011, at 9:49 PM, Prabhakar Kushwaha wrote:
>
>> ten-bit interface (TBI) module is part of SoC not board.
>>
>> Move tbi entries from board related dts files to Si dts.
>>
>> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
>> ---
>> Based upon http://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git (branch next)
>>
>> arch/powerpc/boot/dts/p1020rdb.dts            |    9 ---------
>> arch/powerpc/boot/dts/p1020rdb_camp_core0.dts |    8 --------
>> arch/powerpc/boot/dts/p1020si.dtsi            |    6 +++++-
>> arch/powerpc/boot/dts/p2020rdb.dts            |    8 --------
>> arch/powerpc/boot/dts/p2020rdb_camp_core0.dts |    8 --------
>> arch/powerpc/boot/dts/p2020si.dtsi            |    6 +++++-
>> 6 files changed, 10 insertions(+), 35 deletions(-)
>>
>> diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
>> index d6a8ae4..a4e5d6c 100644
>> --- a/arch/powerpc/boot/dts/p1020rdb.dts
>> +++ b/arch/powerpc/boot/dts/p1020rdb.dts
>> @@ -211,14 +211,6 @@
>>                       };
>>               };
>>
>> -             mdio at 25000 {
>> -
>> -                     tbi0: tbi-phy at 11 {
>> -                             reg = <0x11>;
>> -                             device_type = "tbi-phy";
>> -                     };
>> -             };
>> -
>>               enet0: ethernet at b0000 {
>>                       fixed-link = <1 1 1000 0 0>;
>>                       phy-connection-type = "rgmii-id";
>> @@ -227,7 +219,6 @@
>>
>>               enet1: ethernet at b1000 {
>>                       phy-handle = <&phy0>;
>> -                     tbi-handle = <&tbi0>;
>>                       phy-connection-type = "sgmii";
>>
>>               };
>
> I'm not sure we should do this.  The phy address we pick is board specific so it should NOT be in .dtsi

Ah, okay.  I was under the impression that the tbi address was
internal to the SoC, and not configurable.

g.


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