[PATCH 2/3] dt: tegra20: Add ehci host controller nodes.

[Olof Johansson]

Hi,

On Tue, Jul 19, 2011 at 3:46 PM,  <achew at nvidia.com> wrote:
> From: Andrew Chew <achew at nvidia.com>
>
> These values were derived from various headers in arch/arm/mach-tegra.
>
> Signed-off-by: Andrew Chew <achew at nvidia.com>
> ---
>  arch/arm/boot/dts/tegra20.dtsi |   52 ++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 52 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
> index 83fedf3..a0353bb 100644
> --- a/arch/arm/boot/dts/tegra20.dtsi
> +++ b/arch/arm/boot/dts/tegra20.dtsi
> @@ -160,5 +160,57 @@
>                interrupts = < 63 >;
>                status = "disabled";
>        };
> +
> +       ehci at c5000000 {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               compatible = "nvidia,tegra20-ehci";
> +               reg = <0xc5000000 0x4000>;
> +               interrupts = < 52 >;
> +               mode = < 1 >;
> +               power_down_on_bus_suspend;
> +               type = "utmi";
> +               hssync_start_delay = < 0 >;
> +               idle_wait_delay = < 17 >;
> +               elastic_limit = < 16 >;
> +               term_range_adj = < 6 >;
> +               xcvr_setup = < 15 >;
> +               xcvr_lsfslew = < 2 >;
> +               xcvr_lsrslew = < 2 >;
> +               status = "disabled";

These are mostly phy related settings, maybe do a phy subnode with
them? That way the usb_phy code can probe on that.


-Olof