question about dma-ranges

Scott Wood scottwood at freescale.com
Thu Oct 28 06:46:02 EST 2010


On Wed, 27 Oct 2010 13:42:27 +1100
David Gibson <david at gibson.dropbear.id.au> wrote:

> On Tue, Oct 26, 2010 at 08:37:55PM -0500, Timur Tabi wrote:
> > On Tue, Oct 26, 2010 at 7:51 PM, Mitch Bradley <wmb at firmworks.com> wrote:
> > >  It's probably unnecessary on modern machines, but old PCs were fairly
> > > restrictive about DMA addresses due to short counters.  The buses on which
> > > such restrictions applied are no longer at the root level, but they were
> > > once there...
> > 
> > It's still necessary.  The QE, which we ship on several of our current
> > parts, can only DMA to/from 32-bit addresses, even on SOCs that
> > support 36-bit addressing for everything else.
> 
> But the QE is not at the top-level, IIRC, so its restrictions can be
> encoded in the dma-ranges on its own bus.  We're talking specifically
> about the special case of dma-ranges in the root node, not the utility
> of dma-ranges in general which is clear.

Plus, in this case does that need to be expressed in the device tree?

Or can the QE code just know about that because it only has 32-bit
registers/descriptor fields for DMA addresses?  I.e. it is a limitation
of all instances of QE, not just as integrated in this system.

-Scott



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