[PATCH 0/8] Reconfigurable FPGAs over PCIe.
Grant Likely
grant.likely at secretlab.ca
Sat Jul 17 04:22:55 EST 2010
On Fri, Jul 16, 2010 at 12:13 PM, Stephen Neuendorffer
<stephen.neuendorffer at xilinx.com> wrote:
> This sequence of patches has the goal of enabling an FPGA connected
> over PCIe to have multiple internal devices specified in a device
> tree.. Of course, such a device should work in any machine, in
> addition to those architectures which use device trees to describe the
> basic platform functionality: In particular, x86. This requires some
> basic support on x86 in order to make device trees work, and small
> amount of driver code to light everything up.
>
> This has been tested on a Virtex5 board plugged into the PCIe slot of
> an x86 machine. The device tree used looks like:
>
> /dts-v1/;
> / {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "simple-bus";
> mb_plb: plb at 0 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "xlnx,plb-v46-1.03.a", "xlnx,plb-v46-1.00.a", "simple-bus";
> xps_hwicap_0: xps-hwicap at 80030000 {
> compatible = "xlnx,xps-hwicap-1.00.a";
> reg = < 0x80030000 0x10000 >;
> xlnx,family = "virtex5";
> xlnx,simulation = "false";
> } ;
> } ;
> } ;
>
> Note that the bulk of the code is work in progress. In particular,
> exactly how the device tree support should get extended to X86 is
> still up for grabs. In addition, there are certain aspects of the
> device tree used which are suboptimal: The PCIe bridge translation
> range is currently hardcoded into the driver, and there is no
> provision for connecting interrupt lines into the PCIe bridge.
> Comments greatly appreciated...
>
> Grant: I've thrown in two hwicap patches, which should be final, if
> you want to pick them up that would be great.
Okay, I'll take a look.
g.
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