[PATCH v3 1/4] NAND: FSL-UPM: add multi chip support
Wolfgang Grandegger
wg at grandegger.com
Thu Mar 26 00:43:31 EST 2009
Grant Likely wrote:
> On Wed, Mar 25, 2009 at 7:31 AM, Grant Likely <grant.likely at secretlab.ca> wrote:
>> On Wed, Mar 25, 2009 at 4:08 AM, Wolfgang Grandegger <wg at grandegger.com> wrote:
>>> This patch adds support for multi-chip NAND devices to the FSL-UPM
>>> driver. This requires support for multiple GPIOs for the RNB pins.
>>> The NAND chips are selected through address lines defined by the
>>> FDT property "chip-offset".
>>>
>>> Signed-off-by: Wolfgang Grandegger <wg at grandegger.com>
>> Hi Wolfgang,
>>
>> Can you please send a sample device tree snippit for this and add
>> documentation updates to your patch for the extended binding?
>
> Oh, and cc: devicetree-discuss at ozlabs.org in your next posting.
OK, does patch 3/4 not already contain what you are looking for? See:
http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069787.html
I separated it from the NAND patches because they go through the MTD
maintainer(s).
BTW: did you have a chance to look into the following RFC on I2C bus
speed setting?
http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069489.html
Thanks,
Wolfgang.
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